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august 2008 rev 8 1/49 1 lri64 memory tag ic at 13.56 mhz, with 64-bit unique id and worm user area, iso 15693 and is o 18000-3 mode 1 compliant features iso 15693 compliant iso 18000-3 mode 1 compliant 13.56 mhz 7 khz carrier frequency supported data transfer to the lri64: 10% ask modulation usi ng ?1-out-of-4? pulse position coding (26 kbit/s) supported data transfer from the lri64: load modulation using manchester coding with 423 khz single subcarrier in fast data rate (26 kbit/s) internal tuning capacitor (21 pf, 28.5 pf, 97 pf) 7 8 bits worm user area 64-bit unique identifier (uid) read block and write block commands (8-bit blocks) 7 ms programming time (typical) more than 40-year data retention electrical article surveillance (eas) capable (software controlled) packages ? ecopack? (rohs compliant) ufdfpn8 (mb) 2 3 mm2 (mlp) ?unsawn wafer ? bumped and sawn wafer www.st.com
contents lri64 2/49 contents 1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.1 memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2 signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3 commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1 inventory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.2 stay quiet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.3 read block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.4 write block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.5 get_system_info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.6 initial dialogue for vicinity cards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 power transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.1 frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.2 operating field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 communication signal from vcd to lri64 . . . . . . . . . . . . . . . . . . . . . . 11 6 data rate and data coding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7 vcd to lri64 frames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 8 communications signal from lr i64 to vcd . . . . . . . . . . . . . . . . . . . . . 14 8.1 load modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8.2 subcarrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8.3 data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8.4 bit representation and coding using one subcarrier, at the high data rate 14 8.4.1 logic 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8.4.2 logic 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 9 lri64 to vcd frames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 9.1 lri64 sof . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
lri64 contents 3/49 9.2 lri64 eof . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 10 special fields . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 10.1 unique identifier (uid) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 10.2 application family identifier (afi) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 10.3 data storage format identifier (dsfid) . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 10.4 cyclic redundancy code (crc) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 11 lri64 protocol description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 12 lri64 states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 12.1 power-off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 12.2 ready state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 12.3 quiet state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 13 modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 13.1 addressed mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 13.2 non-addressed mode (general request) . . . . . . . . . . . . . . . . . . . . . . . . . 22 14 flags and error codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 14.1 request flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 14.2 response flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 14.3 response error code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 15 anticollision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 15.1 request flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 15.2 mask length and mask value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 15.3 inventory responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 16 request processing by the lri64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 16.1 explanation of the possible cases . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 17 timing definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 17.1 lri64 response delay, t1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 17.2 vcd new request delay, t2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 17.3 vcd new request delay when there is no lri64 response, t3 . . . . . . . . . 31
contents lri64 4/49 18 command codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 18.1 inventory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 18.2 stay quiet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 18.3 read single block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 18.4 write single block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 18.5 get system info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 19 maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 20 dc and ac parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 21 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 22 part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 appendix a algorithm for pulsed slot s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 appendix b c-example to calcul ate or check the crc16 according to iso/iec 13239 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 22.1 crc calculation example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 appendix c application family iden tifier (afi) coding . . . . . . . . . . . . . . . . . . . . 47 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
lri64 list of tables 5/49 list of tables table 1. signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 2. 10% modulation parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 3. request flags 1 to 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 4. request flags 5 to 8 (when bit 3 = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 5. request flags 5 to 8 (when bit 3 = 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 6. response flags 1 to 8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 7. response error code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 8. timing values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table 9. command codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 table 10. block lock status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 table 11. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 table 12. operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 table 13. dc characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 table 14. ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 table 15. ufdfpn8 (mlp8) 8-lead ultra thin fine pitch dual flat package no lead 2 3 mm, package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 table 16. ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 table 17. crc definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 table 18. afi coding. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 table 19. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
list of figures lri64 6/49 list of figures figure 1. logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 2. ufdfpn8 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 3. lri64 memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 4. 10% modulation waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 5. ?1-out-of-4? coding example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 6. ?1-out-of-4? coding mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 7. request sof, using the ?1-out-of-4? data coding mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 8. request eof . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 9. logic 0, high data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 10. logic 1, high data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 11. response sof, using high data rate and one subcarrier. . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 12. response eof, using high data rate and one subcarrier. . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 13. uid format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 14. decision tree for afi . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 15. crc format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 16. vcd request frame format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 17. lri64 response frame format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 18. lri64 protocol timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 19. lri64 state transition diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 20. comparison between the mask, slot number and uid . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 21. description of a possible anticollision sequence bet ween lri64 devices . . . . . . . . . . . . . 29 figure 22. inventory, request frame format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 23. inventory, response frame format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 24. stay quiet, request frame format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 figure 25. stay quiet frame exchange between vcd and lri64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 figure 26. read single block, request frame format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 figure 27. read single block, response frame format, when error_flag is not set . . . . . . . . . . . . . . 34 figure 28. read single block, response frame format, when error_flag is set . . . . . . . . . . . . . . . . . 34 figure 29. read single block frame exchange between vcd and lri64 . . . . . . . . . . . . . . . . . . . . . 35 figure 30. write single block, request frame format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5 figure 31. write single block, response frame format, when error_flag is not set. . . . . . . . . . . . . . . 35 figure 32. write single block, response frame format, when error_flag is set. . . . . . . . . . . . . . . . . . 36 figure 33. write single block frame exchange between vcd and lri64 . . . . . . . . . . . . . . . . . . . . . . 36 figure 34. get system info, request frame format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 figure 35. get system info, response frame format, when error_flag is not set . . . . . . . . . . . . . . . . 37 figure 36. get system info, response frame format, when error_flag is set . . . . . . . . . . . . . . . . . . . 37 figure 37. get system info frame exchange between vcd and lri64 . . . . . . . . . . . . . . . . . . . . . . . 38 figure 38. lri64 synchronous timing, transmit and receive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 figure 39. ufdfpn8 (mlp8) 8-lead ultra thin fine pitch dual flat package no lead 2 3 mm, package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
lri64 description 7/49 1 description the lri64 is a contactless memory, powered by an externally transmitted radio wave. it contains a 120-bit non-volatile memory. the memory is organized as 15 blocks of 8 bits, of which 7 blocks are accessible as write-once read-many (worm) memory. figure 1. logic diagram the lri64 is accessed using a 13.56 mhz ca rrier wave. incoming data are demodulated from the received amplitude shift keying (ask) signal, 10% modulated. the data are transferred from the reader to the lri64 at 26 kbit/s, using the ?1-out-of-4? pulse encoding mode. outgoing data are sent by the lri64, generated by load variation on the carrier wave, using manchester coding with a single subcarrier frequency of 423 khz. the data are transferred from the lri64 to the reader at 26 kbit/s, in the high data rate mode. the lri64 supports the high data rate communication protocols of iso 15693 and iso 18000-3 mode 1 recommendations. all other data rates and modulations are not supported by the lri64. table 1. signal names figure 2. ufdfpn8 connections 1. n/c means not connected internally. signal name description ac1 antenna coil ac0 antenna coil ai08590 ac1 lri64 ac0 power supply regulator manchester load modulator ask demodulator 120-bit worm memory 1 ai11612 2 3 4 8 7 6 5 ac0 ac1 n/c n/c n/c n/c n/c n/c
description lri64 8/49 1.1 memory mapping the lri64 is organized as 15 blocks of 8 bits as shown in figure 3 . each block is automatically write-protected after the first valid write access. figure 3. lri64 memory mapping the lri64 uses the first 8 blocks (blocks 0 to 7) to store the 64-bit unique identifier (uid). the uid is used during the anticollis ion sequence (inventory). it is written, by st, at time of manufacture, but part of it can be customer-a ccessible and customer-w ritable, on special request. the lri64 has an afi register, in which to stor e the application family identifier value, which is also used during the anticollis ion sequence. the lri64 has a dsfid register, in which to store the data storage format identifier value, which is used for the lri64 inventory answer. the five following blocks (blocks 10 to 14) are write-once read-many (worm) memory. it is possible to write to each of them once. af ter the first valid write access, the block is automatically locked, and only read commands are possible. ai09741 block addr 01234567 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 uid 0 uid 1 uid 2 uid 3 uid 4 uid 5 = ic_id uid 6 = 02h uid 7 = e0h afi (worm area) dsfid (worm area) worm area worm area worm area worm area worm area
lri64 signal description 9/49 2 signal description ac1, ac0 the pads for the antenna coil. ac1 and ac0 must be directly bonded to the antenna. 3 commands the lri64 supports the following commands: 3.1 inventory used to perform the anticollisio n sequence. the lri64 answer s to the inventory command when all of the 64 bits of the uid have been correctly written. 3.2 stay quiet used to put the lri64 in quiet mode. in this mode, the lri64 only responds to commands in addressed mode. 3.3 read block used to output the 8 bits of the selected block. 3.4 write block used to write a new 8-bit value in the selected block, provided that the block is not locked. this command can be issued only once to each block. 3.5 get_system_info used to allow the application system to identify the product. it gives the lri64 memory size, and ic reference (ic_id). 3.6 initial dialogue for vicinity cards the dialogue between the vicinity coupling device (vcd) and the lri64 is conducted according to a technique called reader talk first (rtf). this involves the following sequence of operations: 1. activation of the lri64 by the rf operating field of the vcd 2. transmission of a command by the vcd 3. transmission of a response by the lri64
power transfer lri64 10/49 4 power transfer power transfer to the lri64 is accomplished by inductive coupling of the 13.56 mhz radio signal between the antennas of the lri64 and vcd. the rf field transmitted by the vcd induces an ac voltage on the lri64 antenna, which is then rectified, smoothed and voltage- regulated. any amplitude modulation present on the signal is demodulated by the amplitude shift keying (ask) demodulator. 4.1 frequency iso 15693 and iso 18000-3 mode 1 standards define the carrier frequency ( f c ) of the operating field to be 13.56 mhz7khz. 4.2 operating field the lri64 operates continuously between h min and h max . the minimum operating field is h min and has a value of 150ma/m (rms). the maximum operating field is h max and has a value of 5a/m (rms). a vcd generates a field of at least h min and not exceeding h max in the operating volume.
lri64 communication signal from vcd to lri64 11/49 5 communication signal from vcd to lri64 communications between the vcd and the lri64 involves a type of amplitude modulation called amplitude sh ift keying (ask). the lri64 only supports the 10% modulation mode specified in iso 15693 and iso 18000- 3 mode 1 standards. any request that the vcd might send using the 100% modulation mode, is ignored, and the lri64 remains in its current state. however, the lri64 is, in fact, operational for any degree of modulation index from between 10% and 30%. the modulation index is defined as (a-b)/(a+b) where a and b are the peak and minimum signal amplitude, respectively, of the carrier frequency, as shown in figure 4 . figure 4. 10% modulation waveform figure 5. ?1-out-of-4? coding example table 2. 10% modulation parameters parameter min max hr ? 0.1 x (a-b) hf ? 0.1 x (a-b) ai06655b trff trfsfl trfr hr hf ab t ai06659b 75.52 s 75.52 s 75.52 s 75.52 s 00 10 01 11
data rate and data coding lri64 12/49 6 data rate and data coding the data coding method involves pulse position modulation. the lri64 supports the ?1-out- of-4? pulse coding mode. any request that th e vcd might send in the ?1-out-of-256? pulse coded mode, is ignored, and the lri64 remains in its current state. two bit values are encoded at a time, by the po sitioning of a pause of the carrier frequency in one of four possible 18.88 s (256/ f c ) time slots, as shown in figure 6 . four successive pairs of bits form a byte. the transmission of one byte takes 302.08 s and, consequently, the data rate is 26.48 kbit/s ( f c /512). the encoding for the least significant pair of bits is transmitted first. for example figure 5 shows the transmission of e1h (225d, 1110 0001b) by the vcd. figure 6. ?1-out-of-4? coding mode ai06658 9.44 s 9.44 s 75.52 s 28.32 s 9.44 s 75.52 s 47.20s 9.44 s 75.52 s 66.08 s 9.44 s 75.52 s pulse position for "00" pulse position for "11" pulse position for "10" (0=lsb) pulse position for "01" (1=lsb)
lri64 vcd to lri64 frames 13/49 7 vcd to lri64 frames request frames are delimited by a start of frame (sof) and an end of frame (eof) and are implemented using a code violation mechanism. unused options are reserved for future use. the lri64 is ready to receive a new command frame from the vcd after a delay of t 2 (see ta bl e 1 4 ) after having sent a response frame to the vcd. the lri64 generates a power-on delay of t por (see ta b l e 1 4 ) after being activated by the powering field. after this delay, the lri64 is ready to receive a command frame from the vcd. in iso 15693 and iso 18000-3 mode 1 standards, the sof is used to define the data coding mode that the vcd is going to use in the following command frame. the sof that is shown in figure 7 selects the ?1-out-of-4? data coding mode. (the lri64 does not support the sof for the ?1-out-of-256? data coding mode.) the corresponding eof sequence is shown in figure 8 . figure 7. request sof, using the ?1-out-of-4? data coding mode figure 8. request eof ai06660 37.76 s 9.44 s 9.44 s 37.76 s 9.44 s ai06662 9.44 s 37.76 s 9.44 s
communications signal from lri64 to vcd lri64 14/49 8 communications signal from lri64 to vcd iso 15693 and iso 18000-3 mode 1 standards define several modes, for some parameters, to cater for use in different application requirements and noise environments. the lri64 does not support all of these modes, but suppor ts the single subcarrier mode at the fast data rate. 8.1 load modulation the lri64 is capable of communication to t he vcd via the inductive coupling between the two antennas. the carrier is loaded, with a subcarrier with frequency f s , generated by switching a load in the lri64. the amplitude of the variation to the signal, as received on the vcd antenna, is at least 10 mv, when measured as described in the test methods defined in international standard iso 10373-7. 8.2 subcarrier the lri64 supports the one subcarrier modulation response format. this format is selected by the vcd using the first bit in the protocol header. the frequency, f s , of the subcarrier load modulation is 423.75 khz (= f c /32). 8.3 data rate the lri64 response uses the high data rate format (26.48 kbit/s). the selection of the data rate is made by the vcd using the second bit in the protocol header. 8.4 bit representation and coding using one subcarrier, at the high data rate data bits are encoded using manchester coding, as described in figure 9 and figure 10 . 8.4.1 logic 0 a logic 0 starts with 8 pulses of 423.75 khz ( f c /32) followed by an unmodulated period of 18.88 s as shown in figure 9 . figure 9. logic 0, high data rate ai06663 37.76 s
lri64 communications signal from lri64 to vcd 15/49 8.4.2 logic 1 a logic 1 starts with an unmodulated period of 18.88 s followed by 8 pulses of 423.75 khz ( f c /32) as shown in figure 10 . figure 10. logic 1, high data rate ai06664 37.76 s
lri64 to vcd frames lri64 16/49 9 lri64 to vcd frames response frames are delimited by a start of frame (sof) and an end of frame (eof) and are implemented using a code violation mechanism. the lri64 supports these in the one subcarrier mode, at the fast data rate, only. the vcd is ready to receive a response frame from the lri64 before 320.9s (t 1 ) after having sent a command frame. 9.1 lri64 sof sof comprises three parts: (see figure 11 ) an unmodulated period of 56.64 s, 24 pulses of 423.75 khz ( f c /32), a logic 1 which starts with an unmodulated period of 18.88 s followed by 8 pulses of 423.75 khz. 9.2 lri64 eof eof comprises three parts: (see figure 12 ) a logic 0 which starts with 8 pulses of 423.75 khz followed by an unmodulated period of 18.88 s. 24 pulses of 423.75 khz ( f c /32), an unmodulated time of 56.64 s. figure 11. response sof, using high data rate and one subcarrier figure 12. response eof, using high data rate and one subcarrier ai06671b 113.28 s 37.76 s ai06675b 113.28 s 37.76 s
lri64 special fields 17/49 10 special fields 10.1 unique identifier (uid) members of the lri64 family are uniquely identified by a 64-bit unique identifier (uid). this is used for addressing each lri64 device un iquely and individually, during the anticollision loop and for one-to-one exchange between a vcd and an lri64. the uid complies with iso/iec 15963 and iso/iec 7816-6. it is a read-only code, and comprises (as summarized in figure 13 ): 8-bit prefix, the most significant bits, set at e0h 8-bit ic manufacturer code (iso/iec 7816-6/am1), set at 02h (for stmicroelectronics) 48-bit unique serial number figure 13. uid format figure 14. decision tree for afi ai09725 e0h unique serial number 02h 63 55 47 0 most significant bits least significant bits ai06679b inventory request received no no answer yes no afi value = 0 ? yes no afi flag set ? yes answer given by the vicc to the inventory request afi value = internal value ?
special fields lri64 18/49 10.2 application family identifier (afi) the application family identifier (afi) indicates the type of application targeted by the vcd, and is used to select only those lri64 devices meeting the required application criteria (as summarized in figure 14 ). the value is programmed by the lri64 issuer in the afi register. once programmed, it cannot be modified. the most significant nibble of the afi is used to indicate one specific application, or all families. the least significant nibb le of the afi is used to code one specific subfamilies, or all subfamilies. subfamily codes, ot her than 0, are propr ietary (as described in iso 15693 and iso 18000-3 mode 1 documentation). 10.3 data storage format identifier (dsfid) the data storage format identifier (dsfid) indicates how the data is structured in the lri64 memory. it is coded on one byte. it allows for quick and brief knowledge on the logical organization of the data. it is programmed by the lri64 issuer in the dsfid register. once programmed, it cannot be modified. 10.4 cyclic redundancy code (crc) the cyclic redundancy code (crc) is calculated as defined in iso/iec 13239, starting from an initial register content of all ones: ffffh. the 2-byte crc is appended to each request and each response, within each frame, before the eof. the crc is calculated on all the bytes after the sof, up to the crc field. upon reception of a request from the vcd, the lri64 verifies that the crc value is valid. if it is invalid, it discards the frame, and does not answer the vcd. upon reception of a response from the lri64, it is recommended that the vcd verify that the crc value is valid. if it is invalid, the action s that need to be performed are up to the vcd designer. the crc is transmitted least signifi cant byte first. each byte is transmitted least significant bit first, as shown in figure 15 ). figure 15. crc format ai09726 most significant byte least significant byte l.s.bit l.s.bit m.s.bit m.s.bit
lri64 lri64 protocol description 19/49 11 lri64 protocol description the transmission protocol defines the mechanism to exchange instructions and data between the vcd and the lri64, in each direction. based on ?vcd talks first?, the lri64 does not start transmitting unless it has received and properly decoded an instruction sent by the vcd. the protocol is based on an exchange of: a request from the vcd to the lri64 a response from the lri64 to the vcd each request and each response are contained in a frame. the frame delimiters (sof, eof) are described in the previous paragraphs. each request ( figure 16 ) consists of: request sof ( figure 7 ) request flags ( ta bl e 3 to ta bl e 5 ) command code parameters (depending on the command) application data 2-byte crc ( figure 15 ) request eof ( figure 8 ) each response ( figure 17 ) consists of: response sof ( figure 11 ) response flags ( ta b l e 6 ) parameters (depending on the command) application data 2-byte crc ( figure 15 ) response eof ( figure 12 ) the number of bits transmitted in a frame is a multiple of eight, and thus always an integer number of bytes. single-byte fields are transmitted least significant bit first. multiple-byte fields are transmitted least significant byte first, with each byte transmitted least significant bit first. the setting of the flags indicates the presence of any optional fields. when the flag is set, 1, the field is present. when the flag is reset, 0, the field is absent. figure 16. vcd request frame format ai09727 request sof request flags command code parameters data 2-byte crc request eof
lri64 protocol description lri64 20/49 figure 17. lri64 response frame format figure 18. lri64 protocol timing ai09728 response sof response flags parameters data 2-byte crc response eof ai06830b vcd request frame request frame vicc response frame response frame timing t1 t2 t1 t2
lri64 lri64 states 21/49 12 lri64 states a lri64 can be in any one of three states: power-off ready quiet transitions between these states are as specified in figure 19 . 12.1 power-off state the lri64 is in the power-off state when it receives insufficient energy from the vcd. 12.2 ready state the lri64 is in the ready state when it receives enough energy from the vcd. it answers to any request in addressed and non-addressed modes. 12.3 quiet state when in the quiet state, the lri64 answers to any request in addressed mode.
modes lri64 22/49 13 modes the term mode refers to the mechanism for specifying, in a request, the set of lri64 devices that shall answer to the request. 13.1 addressed mode when the address_flag is set to 1 (addressed mode), the request contains the unique id (uid) of the addressed lri64 device (such as an lri64 device). any lri64 receiving a request in which the address_flag is set to 1, compares the received unique id to its own uid. if it matches, it execute the request (if possible) and returns a response to the vcd, as specified by the command description. if it does not match, the lri64 device remains silent. 13.2 non-addressed mode (general request) when the address_flag is set to 0 (non-addressed mode), the request does not contain a unique id field. any lri64 device receiving a request in which the address_flag is set to 0, executes the request and returns a response to the vcd as specified by the command description. figure 19. lri64 state transition diagram ai09723 power off in field out of field write, read, get_system_info in addressed mode stay quiet(uid) out of field inventory (if uid written) write, read, get_system_info in addressed and non-addressed modes ready quiet
lri64 flags and error codes 23/49 14 flags and error codes 14.1 request flags in a request, the 8-bit flags field specifies th e actions to be performed by the lri64, and whether corresponding fields are present or not. flag bit 3 (the inventory_flag) defines the way the four most significant flag bits (5 to 8) are used. when bit 3 is reset (0), bits 5 to 8 define the lri64 selection criteria. when bit 3 is set (1), bits 5 to 8 define the lri64 inventory parameters. table 3. request flags 1 to 4 bit name value (1) 1. if the value of the request flag is a non authorized value, the lri64 does not execute the command, and does not respond to the request. description 1 subcarrier flag 0 single subcarrier frequency mode. (option 1 is not supported) 2 data_rate flag 1 high data rate mode. (option 0 is not supported) 3 inventory flag 0 flags 5 to 8 meaning are according to ta b l e 4 1 flags 5 to 8 meaning are according to ta b l e 5 4 protocol extension flag 0 no protocol format extension. must be set to 0. (option 1 is not supported) table 4. request flags 5 to 8 (when bit 3 = 0) bit name value (1) 1. only bit 6 (address flag) can be configured for the lri64. all other s bits (5, 7 and 8) must be reset to 0. description 5 select flag 0 no selection mode. must be set to 0. (option 1 is not supported) 6 address flag 0 non addressed mode. the uid field is not present in the request. all lri64 shall answer to the request. 1 addressed mode. the uid field is present in the request. only the lri64 that matches the uid answers the request. 7 option flag (1) 0 no option. must be set to 0. (option 1 is not supported) 8rfu (1) 0 no option. must be set to 0. (option 1 is not supported)
flags and error codes lri64 24/49 14.2 response flags in a response, the 8-bit flags field indicates how actions have been performed by the lri64, and whether corresponding fields are present or not. 14.3 response error code if the error flag is set by the lri64 in the response, the error code field is present and provides information about the error that occurred. ta bl e 7 shows the one error code that is supported by the lri64. table 5. request flags 5 to 8 (when bit 3 = 1) bit name value (1) 1. bits 7 and 8 must be reset to 0. description 5afi flag 0 afi field is not present 1 afi field is present 6 nb_slots flag 0 16 slots 11 slot 7 option flag 0 no option. must be set to 0. (option 1 is not supported) 8rfu 0 no option. must be set to 0. (option 1 is not supported) table 6. response flags 1 to 8 bit name value description 1 error flag 0 no error 1 error detected. error code is in the "error" field. 2rfu 0 3rfu 0 4rfu 0 5rfu 0 6rfu 0 7rfu 0 8rfu 0 table 7. response error code error code meaning 0fh error with no specific information given
lri64 anticollision 25/49 15 anticollision the purpose of the anticollision sequence is to allow the vcd to compile a list of the lri64 devices that are present in the vcd field, each one identified by its unique id (uid). the vcd is the master of the communication with one or multiple lri64 devices. it initiates the communication by issuing the inventory request ( figure 22 ). 15.1 request flags the nb_slots_flag needs to be set appropriately. the afi flag needs to be set, if the optional afi field is to be present. 15.2 mask length and mask value the mask length defines the number of significant bits in the mask value. the mask value is contained in an integer number of bytes. the least significant bit of each is transmitted first. if the mask length is not a multiple of 8 (bits), the most significant end of the mask value is padded with the required number of null bits (set to 0) so that the mask value is contained in an integer number of bytes, so that the next field (the 2-byte crc) starts at the next byte boundary. in the example of figure 20 , the mask length is 11 bits. the mask value, 10011001111, is padded out at the most significant end with five bits set to 0. the 11-bit mask plus the current slot number is compared to the uid. 15.3 inventory responses each lri64 sends its response in a given time slot, or else remains silent. the first slot starts immediately after the reception of the request eof. to switch to the next slot, the vcd sends another eof. the following rules and restrictions apply: if no lri64 answer is detected, the vcd may switch to the next slot by sending an eof if one or more lri64 answers are detected, the vcd waits until the complete frame has been received before sending an eof, to switch to the next slot. the pulse shall be generated according to the definition of the eof in iso 15693 and iso 18000-3 mode 1 standards.
anticollision lri64 26/49 figure 20. comparison between the mask, slot number and uid ai06682 mask value received in the inventory command 0000 0100 1100 1111 b 16 bits the mask value less the padding 0s is loaded into the tag comparator 100 1100 1111 b 11 bits the slot counter is calculated xxxx nb_slots_flags = 0 (16 slots), slot counter is 4 bits the slot counter is concatened to the mask value xxxx 100 1100 1111 b nb_slots_flags = 0 15 bits the concatenated result is compared with the least significant bits of the tag uid. xxxx xxxx ..... xxxx xxxx x xxx xxxx xxxx xxxx 64 bits lsb msb b lsb msb lsb msb lsb msb b0 b63 compare bits ignored uid 4 bits
lri64 request processing by the lri64 27/49 16 request processing by the lri64 upon reception of a valid request, the lri64 performs the following algorithm, where: nbs is the total number of slots (1 or 16) sn is the current slot number (0 to 15) the lsb(value,n) function returns the n least significant bits of value the msb(value,n) function returns the n most significant bits of value ?&? is the concatenation operator slot_frame is either a sof or an eof sn = 0 if (nb_slots_flag) then nbs = 1 sn_length = 0 endif else nbs = 16 sn_length = 4 endif label1: if lsb(uid, sn_length + mask_length) = lsb(sn,sn_length)&lsb(mask,mask_length) then answer to inventory request endif wait (slot_frame) if slot_frame = sof then stop anticollision decode/process request exit endif if slot_frame = eof if sn < nbs-1 then sn = sn + 1 goto label1 exit endif endif
request processing by the lri64 lri64 28/49 16.1 explanation of the possible cases figure 21 summarizes the main poss ible cases that can occu r during an anticollision sequence when the number of slots is 16. the different steps are: the vcd sends an inventory request, in a frame, terminated by a eof. the number of slots is 16. lri64 #1 transmits its response in slot 0. it is the only one to do so, therefore no collision occurs and its uid is rece ived and registered by the vcd; the vcd sends an eof, to switch to the next slot. in slot 1, two lri64 devices, #2 and #3, transmit their responses. this generates a collision. the vcd records it , and remembers that a collis ion was detected in slot 1. the vcd sends an eof, to switch to the next slot. in slot 2, no lri64 transmits a response. therefore the vcd does not detect a lri64 sof, and decides to switch to the next slot by sending an eof. in slot 3, there is anot her collision caused by respon ses from lri64 #4 and #5 the vcd then decides to send a request (for instance a read block) to lri64 #1, whose uid was already correctly received. all lri64 devices detect a sof and exit the anticollision sequence. they process this request and since the request is addressed to lri64 #1, only lri64 #1 transmits its response. all lri64 devices are ready to receive another request. if it is an inventory command, the slot numbering sequence restarts from 0. note: the decision to interrupt th e anticollision sequence is up to th e vcd. it could have continued to send eofs until slot 15 and then send the request to lri64 #1.
lri64 request processing by the lri64 29/49 figure 21. description of a possible anticollision sequence between lri64 devices ai06831b slot 0 slot 1 slot 2 slot 3 vcd sof inventory request eof eof eof eof sof request to lri512 1 eof response 2 response 4 viccs response from lri512 1 response 1 response 3 response 5 timing t1 t2 t1 t2 t3 t1 t2 t1 comment no collision collision no response collision time
timing definitions lri64 30/49 17 timing definitions figure 21 shows three specific delay times: t 1 , t 2 and t 3 . all of them have a minimum value, specified in ta bl e 1 4 . the t 1 parameter also has a maximum and a typical value specified in ta bl e 1 4 , as summarized in ta bl e 8 . 17.1 lri64 response delay, t 1 upon detection of the rising edge of the eof received from the vcd, the lri64 waits for a time equal to t 1 (typ) = 4352 / f c before starting to transmit its response to a vcd request, or switching to the next slot when in an inventory process. 17.2 vcd new request delay, t 2 t 2 is the time after which the vcd may send an eof to switch to the next slot when one or more lri64 responses have been received during an inventory command. it starts from the reception of the eof received from the lri64 devices. the eof sent by the vcd is 10% modulated, independent of the modulation index used for transmitting the vcd request to the lri64. t 2 is also the time after which the vcd may send a new request to the lri64 as described in figure 18 . t 2 (min) = 4192 / f c table 8. timing values (1) 1. the tolerance of specific timings is 32/ f c . min. typ. max. t 1 t 1 (min) t 1 (typ) = 4352 / f c t 1 (max) t 2 t 2 (min) = 4192 / f c ?? t 3 t 1 (max) + t sof (see notes (2),(3) ) 2. t sof is the duration for the lri64 to transmit an sof to the vcd. 3. t 1 (max) does not apply for write alike reques ts. timing conditions for write alike requests are defined in the command description. ??
lri64 timing definitions 31/49 17.3 vcd new request delay when there is no lri64 response, t 3 t 3 is the time after which the vcd may send an eof to switch to the next slot when no lri64 response has been received. the eof sent by the vcd is 10% modulated, independent of the modulation index used for transmitting the vcd request to the lri64. from the time the vcd has generated the rising edge of an eof: the vcd waits for a time at least equal to the sum of t 3 (min) and the typical response time of an lri64, which depends on the data rate and subcarrier modulation mode, before sending a subsequent eof.
command codes lri64 32/49 18 command codes the lri64 supports the command codes listed in ta b l e 9 . 18.1 inventory when receiving the inventory request, the lri64 performs the anticollision sequence. the inventory_flag is set to 1. the meanings of flags 5 to 8 is as described in ta bl e 5 . the request frame ( figure 22 ) contains: request flags ( ta bl e 3 and ta b l e 5 ) inventory command code (01h, ta b l e 9 ) afi, if the afi flag is set mask length mask value 2-byte crc ( figure 15 ) in case of errors in the inventory request frame, the lri64 does not generate any answer. the response frame ( figure 23 ) contains: response flags ( ta b l e 6 ) dsfid unique id 2-byte crc ( figure 15 ) figure 22. inventory, request frame format figure 23. inventory, response frame format table 9. command codes command code function 01h inventory 02h stay quiet 20h read single block 21h write single block 2bh get system info ai09729 request sof request flags command code optional afi mask value 2-byte crc request eof 8 bits 8 bits 01h 8 bits 0 to 8 bytes 16 bits mask length 8 bits ai09730 response sof response flags dsfid 2-byte crc response eof 8 bits 8 bits 16 bits uid 64 bits
lri64 command codes 33/49 18.2 stay quiet the stay quiet command is always executed in addressed mode (the address_flag is set to 1). the request frame ( figure 24 ) contains: request flags (22h, as described in ta b l e 3 and ta b l e 4 ) stay quiet command code (02h, ta bl e 9 ) unique id 2-byte crc ( figure 15 ) when receiving the stay quiet command, the lri64 enters the quiet state and does not send back a response. there is no response to the stay quiet command. when in the quiet state: the lri64 does not process any request in which the inventory_flag is set the lri64 responds to commands in the addressed mode if the uid matches the lri64 exits the quiet state when it is taken to the power off state ( figure 19 ). figure 24. stay quiet, request frame format figure 25. stay quiet frame exchange between vcd and lri64 ai09731 request sof request flags command code 2-byte crc request eof 8 bits 22h 8 bits 02h 16 bits uid 64 bits ai06842 vcd sof stay quiet request eof
command codes lri64 34/49 18.3 read single block when receiving the read single block command, the lri64 reads the requested block and sends back its 8-bit value in the response. the option_flag is supported. the read single block can be issued in both addressed and non addressed modes. the request frame ( figure 26 ) contains: request flags ( ta bl e 3 and ta b l e 4 ) read single block command code (20h, ta b l e 9 ) unique id (optional) block number 2-byte crc ( figure 15 ) if there is no error, at the lri64, the response frame ( figure 27 ) contains: response flags ( ta b l e 6 ) block locking status, if option_flag is set 1 byte of block data ( ta bl e 1 0 ) 2-byte crc ( figure 15 ) otherwise, if there is an error, the response frame ( figure 28 ) contains: response flags (01h, ta bl e 6 ) error code (0fh, ta bl e 7 ) 2-byte crc ( figure 15 ) figure 26. read single block, request frame format figure 27. read single block, response frame format, when error_flag is not set figure 28. read single block, response frame format, when error_flag is set table 10. block lock status bit name value description 0 block locked 0 current block not locked 1 current block locked 1 to 7 rfu 0 ai09732 request sof request flags command code uid 2-byte crc request eof 8 bits 8 bits 20h 64 bits 16 bits block number 8 bits ai09733 response sof response flags blocklock status 2-byte crc response eof 8 bits 8 bits 16 bits data 8 bits ai09734 response sof response flags error code 2-byte crc response eof 8 bits 01h 8 bits 0fh 16 bits
lri64 command codes 35/49 figure 29. read single block frame exchange between vcd and lri64 18.4 write single block when receiving the write single block command, the lri64 writes the requested block with the data contained in the request and report the success of the operation in the response. the option_flag is not supported and must be set to 0. the write single block can be issued in both addressed and non addressed modes. during the write cycle t w , no modulation shall occur, otherwise the lri64 may program the data incorrectly in the memory. the request frame ( figure 30 ) contains: request flags ( ta bl e 3 and ta b l e 4 ) write single block command code (21h, ta b l e 9 ) unique id (optional) block number data 2-byte crc ( figure 15 ) if there is no error, at the lri64, an empty response frame ( figure 31 ) is sent back after the write cycle, containing no parameters. it just contains: response flags ( ta b l e 6 ) 2-byte crc ( figure 15 ) otherwise, if there is an error, the response frame ( figure 32 ) contains: response flags (01h, ta bl e 6 ) error code (0fh, ta bl e 7 ) 2-byte crc ( figure 15 ) figure 30. write single block, request frame format figure 31. write single block, respons e frame format, when error_flag is not set ai06832b vcd vicc t1 sof read single block request eof sof read single block response eof ai09735 request sof request flags command code uid 2-byte crc request eof 8 bits 8 bits 21h 64 bits 16 bits block number 8 bits data 8 bits ai09736 response sof response flags 2-byte crc response eof 8 bits 16 bits
command codes lri64 36/49 figure 32. write single block, response frame format, when error_flag is set figure 33. write single block frame exchange between vcd and lri64 ai09737 response sof response flags error code 2-byte crc response eof 8 bit 01h 8 bits 0fh 16 bits ai06833b vcd vicc vicc t1 eof sof write single block request eof sof write single block response write sequence when error sof write single block response eof t1 tw
lri64 command codes 37/49 18.5 get system info when receiving the get system info command, the lri64 send back its information data in the response.the option_flag is not supported and must be set to 0. the get system info can be issued in both addressed and non addressed modes. the request frame ( figure 26 ) contains: request flags ( ta bl e 3 and ta b l e 4 ) get system info command code (2bh, ta bl e 9 ) unique id (optional) 2-byte crc ( figure 15 ) if there is no error, at the lri64, the response frame ( figure 27 ) contains: response flags ( ta b l e 6 ) information flags set to 0fh, indicating th e four information fields that are present (dsfid, afi, memory size, ic reference) unique id dsfid value (as written in block 9) afi value (as written in block 8) memory size: for the lri64, there are 15 blocks (0eh) of 1 byte (00h). ic reference: only the 6 most significant bits are used. the product code of the lri64 is 00 0101 b =5 d 2-byte crc ( figure 15 ) otherwise, if there is an error, the response frame ( figure 28 ) contains: response flags (01h, ta bl e 6 ) error code (0fh, ta bl e 7 ) 2-byte crc ( figure 15 ) figure 34. get system info, request frame format figure 35. get system info, response frame format, when error_flag is not set figure 36. get system info, response frame format, when error_flag is set ai09738 request sof request flags command code uid 2-byte crc request eof 8 bits 8 bits 2bh 64 bits 16 bits ai09739 response sof response flags information flags uid 2-byte crc response eof 8 bits 00h 8 bits 0fh 64 bits 16 bits dsfid 8 bits afi 8 bits memory size 16 bits 000eh ic ref 8 bits 000101xxb ai09740 response sof response flags error code 2-byte crc response eof 8 bits 01h 8 bits 0fh 16 bits
command codes lri64 38/49 figure 37. get system info frame exchange between vcd and lri64 ai09724 vcd vicc t1 sof get system info request eof sof get system info response eof
lri64 maximum rating 39/49 19 maximum rating stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not imp lied. exposure to absolute ma ximum rating conditions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality documents. table 11. absolute maximum ratings symbol parameter min. max. unit t stg storage temperature ufdfpn8 ?65 150 c wafer (kept in its antistatic bag) 15 25 t stg storage time wafer (kept in its antistatic bag) 23 months i cc supply current on ac0 / ac1 ?20 20 ma v max input voltage on ac0 / ac1 ?7 7 v v esd electrostatic discharge voltage (1) 1. mil. std. 883 - method 3015 ufdfpn8 (hbm) (2) 2. human body model. ?1000 1000 v ufdfpn8 (mm) (3) 3. machine model. ?100 100 v
dc and ac parameters lri64 40/49 20 dc and ac parameters this section summarizes the operating and measurement conditions, and the dc and ac characteristics of the device. the parameters in the dc and ac characteristic tables that follow are derived from tests performed under the measurement conditions summarized in the relevant tables. designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parameters. figure 38. lri64 synchronous timing, transmit and receive figure 38 shows an ask modulated signal, from the vcd to the lri64. the test condition for the ac/dc parameters are: close coupling condition with tester antenna (1mm) gives lri64 performance on tag antenna table 12. operating conditions symbol parameter min. max. unit t a ambient operating temperature ?20 85 c table 13. dc characteristics symbol parameter test conditions (1) 1. t a = ?20 to 85 c min. typ. max. unit v cc regulated voltage 1.5 3.0 v v ret retromodulated induced voltage iso10373-7 10 mv i cc supply current read v cc = 3.0 v 50 a write v cc = 3.0 v 150 a c tun internal tuning capacitor f=13.56 mhz for w4/1 21 pf f=13.56 mhz for w4/2 28.5 pf f=13.56 mhz for w4/3 97 pf ai06680b ab t rff t rfr t rfsbl t min cd f cc
lri64 dc and ac parameters 41/49 table 14. ac characteristics symbol parameter test conditions (1),(2) 1. t a = ?20 to 85 c 2. all timing measurements were performed on a reference antenna with the following characteristics: external size: 75 mm x 48 mm number of turns: 6 width of conductor: 1 mm space between 2 conductors: 0.4 mm value of the tuning capacitor: 28.5 pf (lri64-w4) value of the coil: 4.3 h tuning frequency: 14.4 mhz. min. typ. max. unit f c external rf signal frequency 13.553 13.56 13.567 mhz mi carrier 10% carrier modulation index mi=(a-b)/(a+b) 10 30 % t rfr , t rff 10% rise and fall time 0 3.0 s t rfsbl 10% minimum pulse width for bit 7.1 9.44 s t jit bit pulse jitter ?2 +2 s t mincd minimum time from carrier generation to first data from h-field min 0.1 1 ms f sh subcarrier frequency high f c /32 423.75 khz t 1 time for lri64 response 4352/ f c 313 320.9 322 s t 2 time between commands 4224/ f c 309 311.5 314 s t w programming time 93297/ f c 6.88 ms
package mechanical data lri64 42/49 21 package mechanical data in order to meet environmental requirements, st offers the lri64 in ecopack ? packages. these packages have a lead-free second-level interconnect. the category of second-level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com . figure 39. ufdfpn8 (mlp8) 8-lead ultra thin fine pitch dual flat package no lead 2 3 mm, package outline 1. drawing is not to scale. table 15. ufdfpn8 (mlp8) 8-lead ultra thin fine pitch dual flat package no lead 2 3 mm, package mechanical data symbol millimeters inches (1) 1. values in inches are converted from mm and rounded to 4 decimal digits. typ min max typ min max a 0.55 0.45 0.6 0.0217 0.0177 0.0236 a1 0.02 0 0.05 0.0008 0 0.002 b 0.25 0.2 0.3 0.0098 0.0079 0.0118 d 2 1.9 2.1 0.0787 0.0748 0.0827 d2 1.6 1.5 1.7 0.063 0.0591 0.0669 e 3 2.9 3.1 0.1181 0.1142 0.122 e2 0.2 0.1 0.3 0.0079 0.0039 0.0118 e 0.5 - - 0.0197 - - l 0.45 0.4 0.5 0.0177 0.0157 0.0197 l1 0.15 0.0059 l3 0.3 0.0118 ddd (2) 2. applied for exposed die paddle and terminals. exclude embedding part of exposed die paddle from measuring. 0.08 0.0031 d e ufdfpn-01 a a1 ddd l1 e b d2 l e2 l3
lri64 part numbering 43/49 22 part numbering for a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact your nearest st sales office. table 16. ordering information scheme example: lri64 - w4 / 2 ge device type lri64 package w4 = 180 m 15 m unsawn wafer sbn18 = 180 m 15 m bumped and sawn wafer on 8-inch frame mbtg = ufdfpn8 (mlp8), tape & reel packing, ecopack ? , lead-free, rohs compliant, sb 2 o 3 -free and tbba-free (1) 1. the category of second level interconnect is ma rked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ra tings related to solder ing conditions are also marked on the inner box label. tuning capacitance 1 = 21 pf 2 = 28.5 pf 3 = 97 pf customer code given by st ge = generic product xx = customer code after personalization
algorithm for pulsed slots lri64 44/49 appendix a algorithm for pulsed slots the following pseudo-cod e describes how the anticollision could be implemented on the vcd, using recursive functions. function push (mask, address); pushes on private stack function pop (mask, address); pops from private stack function pulse_next_pause; generates a power pulse function store(lri64_uid); stores lri64_uid function poll_loop (sub_address_size as integer) pop (mask, address) mask = address & mask; generates new mask ; send the request mode = anticollision send_request (request_cmd, mode, mask length, mask value) for sub_address = 0 to (2^sub_address_size - 1) pulse_next_pause if no_collision_is_detected ; lri64 is inventoried then store (lri64_uid) else ; remember a collision was detected push(mask,address) endif next sub_address if stack_not_empty ; if some collisions have been detected and then ; not yet processed, the function calls itself poll_loop (sub_address_size); recursively to process the last stored collision endif end poll_loop main_cycle: mask = null address = null push (mask, address) poll_loop(sub_address_size) end_main_cycle
lri64 c-example to calculate or check the crc16 according to iso/iec 13239 45/49 appendix b c-example to calculate or check the crc16 according to iso/iec 13239 the cyclic redundancy check (crc) is calculated on all data contained in a message, from the start of the flags through to the end of data. this crc is used from vcd to lri64 and from lri64 to vcd. to add extra protection against shifting errors, a further transformation on the calculated crc is made. the one?s complement of the calculated crc is the value attached to the message for transmission. for checking of received messages the 2 crc bytes are often also included in the re- calculation, for ease of use. in this case, given the expected value for the generated crc is the residue of f0b8h 22.1 crc calculation example this example in c language illustrates one met hod of calculating the crc on a given set of bytes comprising a message. #define polynomial0x8408// x^16 + x^12 + x^5 + 1 #define preset_value0xffff #define check_value0xf0b8 #define number_of_bytes4// example: 4 data bytes #define calc_crc1 #define check_crc0 void main() { unsigned int current_crc_value; unsigned char array_of_databytes[number_of_bytes + 2] = {1, 2, 3, 4, 0x91, 0x39}; int number_of_databytes = number_of_bytes; int calculate_or_check_crc; int i, j; calculate_or_check_crc = calc_crc; // calculate_or_check_crc = check_crc;// this could be an other example if (calculate_or_check_crc == calc_crc) { number_of_databytes = number_of_bytes; } table 17. crc definition crc definition crc type length polynomial direction preset residue iso/iec 13239 16 bits x 16 + x 12 + x 5 + 1 = ox8408 backward ffffh f0b8h
c-example to calculate or check the crc16 according to iso/iec 13239 lri64 46/49 else // check crc { number_of_databytes = number_of_bytes + 2; } current_crc_value = preset_value; for (i = 0; i < number_of_databytes; i++) { current_crc_value = current_crc_value ^ ((unsigned int)array_of_databytes[i]); for (j = 0; j < 8; j++) { if (current_crc_value & 0x0001) { current_crc_value = (current_crc_value >> 1) ^ polynomial; } else { current_crc_value = (current_crc_value >> 1); } } } if (calculate_or_check_crc == calc_crc) { current_crc_value = ~current_crc_value; printf ("generated crc is 0x%04x\n", current_crc_value); // current_crc_value is now ready to be appended to the data stream // (first lsbyte, then msbyte) } else // check crc { if (current_crc_value == check_value) { printf ("checked crc is ok (0x%04x)\n", current_crc_value); } else { printf ("checked crc is not ok (0x%04x)\n", current_crc_value); } } }
lri64 application family identifier (afi) coding 47/49 appendix c application family identifier (afi) coding afi (application family identifier) represents th e type of application targeted by the vcd and is used to extract from all the lri64 present only the lri64 meeting the required application criteria. it is programmed by the lri64 issuer (the purchaser of the lri64). once locked, it can not be modified. the most significant nibble of af i is used to code one specific or all application families, as defined in ta bl e 1 8 . the least significant nibble of afi is used to code one specif ic or all application subfamilies. subfamily codes different from 0 are proprietary. table 18. afi coding (1) 1. x and y each represent any single-di git hexadecimal value between 1 and f afi most significant nibble afi least significant nibble meaning lri64 devices respond from examples / note 0 0 all families and subfamilies no applicative preselection x 0 all subfamilies of family x wide applicative preselection x y only the yth subfamily of family x 0 y proprietary subfamily y only 1 0, y transport mass transit, bus, airline, etc. 2 0, y financial iep, banking, retail, etc. 3 0, y identification a ccess control, etc. 4 0, y telecommunication public telephony, gsm, etc. 5 0, y medical 6 0, y multimedia internet services, etc. 70, ygaming 8 0, y data storage portable files, etc. 9 0, y item management a 0, y express parcels b 0, y postal services c 0, y airline bags d0, yrfu e0, yrfu f0, yrfu
revision history lri64 48/49 revision history table 19. document revision history date revision changes 27-aug-2003 1.0 first issue 16-jul-2004 2.0 first public release of full datasheet 22-sep-2004 3.0 values changed for t w , t 1 and t 2 11-jul-2005 4.0 added mlp package information. 7-sept-2005 5.0 modified option_flag information in get system info command and added iso 18000-3 mode 1 compliance. 19-feb-2007 6 document reformatted. ufdpfn8 pa ckage specifications updated (see table 15: ufdfpn8 (mlp8) 8-lead ultra thin fine pitch dual flat package no lead 2 3 mm, package mechanical data ). st offers the lri64 in ecopack? compliant ufdpfn8 packages. c tun value for w4/3 added to table 13: dc characteristics . small text changes. 01-apr-2008 7 small text changes. v esd for mlp package added to table 11: absolute maximum ratings . ufdfpn8 inch values calculated fr om millimeters rounded to four decimal digits (see table 15: ufdfpn8 (mlp8) 8-lead ultra thin fine pitch dual flat package no lead 2 3 mm, package mechanical data ). 28-aug-2008 8 lri64 products are no longer delivered in a1 inlays and a6 and a7 antennas. t stg added for ufdpfn8 package in table 11: absolute maximum ratings . table 16: ordering information scheme clarified.
lri64 49/49 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2008 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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